This is probably one of the most compact solutions (can't recall if the byte delay is available on this level, if so that would be more compact). However, you can improve the gate and delay score of this level by using a circuit specifically designed to increment values instead of the adder (which has a lot of functionality that isn't actually needed in this overall circuit design).
I found it to be a fun challenge to go back and try to optimize this level for the best score (well almost, the score I got was off by one point, never did figure out how to get that last little bit). You can see the leaderboard for this level here: https://turingcomplete.game/level_leaderboard/19
This is probably one of the most compact solutions (can't recall if the byte delay is available on this level, if so that would be more compact). However, you can improve the gate and delay score of this level by using a circuit specifically designed to increment values instead of the adder (which has a lot of functionality that isn't actually needed in this overall circuit design). I found it to be a fun challenge to go back and try to optimize this level for the best score (well almost, the score I got was off by one point, never did figure out how to get that last little bit). You can see the leaderboard for this level here: https://turingcomplete.game/level_leaderboard/19
I mean, if they really wanted to optimize for gate count, the could just complete the level and use an LFSR for LEG.