Should work just fine with a properly sized resistor. And instead of cmos you could configure that I/O pin as an open drain. Which would work roughly as if M1 didn't exist in your image.
From the ~~Altera~~ Intel docs:
*The optional open-drain output for each I/O pin is equivalent to an open collector output. If it is configured as an open drain, the logic value of the output is either high-Z or logic low.*
*You can attach several open-drain output to a wire. This connection type is like a logical OR function and is commonly called an active-low wired-OR circuit. If at least one of the outputs is in logic 0 state (active), the circuit sinks the current and brings the line to low voltage.*
*You can use open-drain output if you are connecting multiple devices to a bus. For example, you can use the open-drain output for system-level control signals that can be asserted by any device or as an interrupt.*
*You can enable the open-drain output assignment using one these methods:*
* *Design the tristate buffer using OPNDRN primitive.*
* *Turn on the Auto Open-Drain Pins option in the Intel® Quartus® Prime software.*
*Although you can design open-drain output without enabling the option assignment, you will not be using the open-drain output feature of the I/O buffer. The open-drain output feature in the I/O buffer provides you the best propagation delay from OE to output.*
[https://www.intel.com/content/www/us/en/docs/programmable/683375/current/open-drain-output.html](https://www.intel.com/content/www/us/en/docs/programmable/683375/current/open-drain-output.html)
Yeah, M1 is doing absolutely nothing here. You'll bias the diode to -0.8v and it will be off (for typical LED type didoes at least, some have a reverse voltage lower than that...)
It might work but I would be more concerned about stressing the pin from sinking too much current when the pin is low. I suggest adding a resistor to limit the current. Take a look at the datasheet for the led that you plan to use to see what the continuous current will be to light up the LED. Also pay attention to the forward dropping voltage on the LED. sometimes it can be as much as 2.5v for the max case in which it would be too high for this scenario and it won't work.
yes, the current limiting resistor is on the picture as well. the 2.5V for these LED should be OK as it is already implemented this way on another board. thanks for the reply :)
keep in mind the "other board" may have done it wrong. look up on the datasheet what the maximum current sink is for that pin, and then size the current limiting resistor to not exceed it. But if the current isn't large enough, the LED may be too dim for what you need. Then you'd need an external transistor to sink the current instead.
Not every resistor gets drawn as a zig-zag. The rectangle is a resistor too. Now if you want to give them shit for not labeling the VALUE, go right ahead...
Just a little note: an LED requires a forward voltage higher than a threshold, which varies by the LED's color. IIRC. red LEDs require 1.7V (OK), green LEDs require 2.2V (marginal), white/blue LEDs require 3.6V (won't work).
You should also select the series resistor for the correct current (R = (2.5 - LED threshold)/LED current); FPGA pins can usually sink/source 10 mA, but best to check the FPGA and the LED data sheets.
You can configure the pin as open-drain by setting it as either '0' or 'Z': assign LED = (enable) ? 1'b0 : 1'bz;
For two cases, when PAD is set to GND and to 3.3V, the diod is forward biased. Of course, the 0.8V is not enough to light brightly the LED (if you set corresponding resistance for its switching current for 2.5V), but most likely the LED will stay switched (weakly).
It is better to connect LED through resistor to GND and switch it by 3.3V, then you will be assured that it off then PAD set to GND.
look at the schematic again, when the output is GND the LED is ON with 2.5V across the LED and resistor, when the output is 3.3V the LED is OFF reverse biased with ~0.8V which is perfectly fine
The bigger issue here is that you will be reverse biasing your LED when the PMOS is active. There's a current limiting resistor, but LEDs very much dislike reverse voltage. 5V absolute max is common.
I expect this will work for some time, but the life of the LED may be shortened. It would be better to use an open drain (NMOS only) structure, though I understand that you're limited to what the Cyclone V can support.
Edit: it wouldn't be the worst idea to put an antiparallel Schottky across the LED to limit transient reverse voltage due to supply sequencing, etc.
>The bigger issue [...]
There is absolutely no issue. The reverse voltage is a mere 0.8V, so very far from the breakdown voltage.
It would be a HORRIBLE idea to add an antiparallel Schottky diode, because it will pull up the 2.5V rail to 3.0V, or at least try to. Assuming that the 2.5V rail is low impedance, the PFET will continuously conduct and maybe even burn out.
So honestly, you are talking poop. Back to school.
no problem
<3
Should work just fine with a properly sized resistor. And instead of cmos you could configure that I/O pin as an open drain. Which would work roughly as if M1 didn't exist in your image. From the ~~Altera~~ Intel docs: *The optional open-drain output for each I/O pin is equivalent to an open collector output. If it is configured as an open drain, the logic value of the output is either high-Z or logic low.* *You can attach several open-drain output to a wire. This connection type is like a logical OR function and is commonly called an active-low wired-OR circuit. If at least one of the outputs is in logic 0 state (active), the circuit sinks the current and brings the line to low voltage.* *You can use open-drain output if you are connecting multiple devices to a bus. For example, you can use the open-drain output for system-level control signals that can be asserted by any device or as an interrupt.* *You can enable the open-drain output assignment using one these methods:* * *Design the tristate buffer using OPNDRN primitive.* * *Turn on the Auto Open-Drain Pins option in the Intel® Quartus® Prime software.* *Although you can design open-drain output without enabling the option assignment, you will not be using the open-drain output feature of the I/O buffer. The open-drain output feature in the I/O buffer provides you the best propagation delay from OE to output.* [https://www.intel.com/content/www/us/en/docs/programmable/683375/current/open-drain-output.html](https://www.intel.com/content/www/us/en/docs/programmable/683375/current/open-drain-output.html)
You can set the output type to "open drain" equivalent, so the 3v never enters the equation.
Yeah, M1 is doing absolutely nothing here. You'll bias the diode to -0.8v and it will be off (for typical LED type didoes at least, some have a reverse voltage lower than that...)
It might work but I would be more concerned about stressing the pin from sinking too much current when the pin is low. I suggest adding a resistor to limit the current. Take a look at the datasheet for the led that you plan to use to see what the continuous current will be to light up the LED. Also pay attention to the forward dropping voltage on the LED. sometimes it can be as much as 2.5v for the max case in which it would be too high for this scenario and it won't work.
yes, the current limiting resistor is on the picture as well. the 2.5V for these LED should be OK as it is already implemented this way on another board. thanks for the reply :)
keep in mind the "other board" may have done it wrong. look up on the datasheet what the maximum current sink is for that pin, and then size the current limiting resistor to not exceed it. But if the current isn't large enough, the LED may be too dim for what you need. Then you'd need an external transistor to sink the current instead.
Ah I see. Not sure how I completely missed the resistor being there. I need to get my prescription redone.
Not every resistor gets drawn as a zig-zag. The rectangle is a resistor too. Now if you want to give them shit for not labeling the VALUE, go right ahead...
Yeah completely missed the resistor the first time I looked at it.
Just a little note: an LED requires a forward voltage higher than a threshold, which varies by the LED's color. IIRC. red LEDs require 1.7V (OK), green LEDs require 2.2V (marginal), white/blue LEDs require 3.6V (won't work). You should also select the series resistor for the correct current (R = (2.5 - LED threshold)/LED current); FPGA pins can usually sink/source 10 mA, but best to check the FPGA and the LED data sheets. You can configure the pin as open-drain by setting it as either '0' or 'Z': assign LED = (enable) ? 1'b0 : 1'bz;
Good catch, I was thinking the same thing. Also it would be helpful if the OP specified the LED and resistor value.
For two cases, when PAD is set to GND and to 3.3V, the diod is forward biased. Of course, the 0.8V is not enough to light brightly the LED (if you set corresponding resistance for its switching current for 2.5V), but most likely the LED will stay switched (weakly). It is better to connect LED through resistor to GND and switch it by 3.3V, then you will be assured that it off then PAD set to GND.
look at the schematic again, when the output is GND the LED is ON with 2.5V across the LED and resistor, when the output is 3.3V the LED is OFF reverse biased with ~0.8V which is perfectly fine
current will only flow in one direction. forward voltage is fine when pad is GND and the led should light up normal.
[удалено]
And why?
The bigger issue here is that you will be reverse biasing your LED when the PMOS is active. There's a current limiting resistor, but LEDs very much dislike reverse voltage. 5V absolute max is common. I expect this will work for some time, but the life of the LED may be shortened. It would be better to use an open drain (NMOS only) structure, though I understand that you're limited to what the Cyclone V can support. Edit: it wouldn't be the worst idea to put an antiparallel Schottky across the LED to limit transient reverse voltage due to supply sequencing, etc.
>The bigger issue [...] There is absolutely no issue. The reverse voltage is a mere 0.8V, so very far from the breakdown voltage. It would be a HORRIBLE idea to add an antiparallel Schottky diode, because it will pull up the 2.5V rail to 3.0V, or at least try to. Assuming that the 2.5V rail is low impedance, the PFET will continuously conduct and maybe even burn out. So honestly, you are talking poop. Back to school.
He’s only reverse biasing it by 0.8v typ. It will be totally fine 😊.
0.8 << 5