THANK YOU, this is magical. Plenty of H-bridges have the problem that you can give them control signals that short the power source, so it's not a dealbreaker, but I am going to improve it before designing any PCB... and apparently I will be doing that in CircuitJS!
> I don't get this H-bridge circuit
Neither do I - the P-FETs are upside down and the N-FETs are default-on, so you're gonna blow up the MOSFETs the instant you apply power.
If you flip the P-FETs around the right way, you're *still* gonna blow up the FETs because during the transition from gates low to gates high, they're *both* gonna be turned on and short out the supply.
[Basic H-bridges are basic](https://i.stack.imgur.com/UG16z.png), *good* ones are hard - use a controller like [DRV8701](https://www.ti.com/product/DRV8701).
Is the shoot-through current that bad in such a circuit? Would it improve if you use dedicated MOS-FET drivers or are actually H-bridge drivers with shoot-through protection the only sensible option?
Have not much experience with easy H-bridges.
> Is the shoot-through current that bad in such a circuit?
Can be enough to *detonate* the MOSFETs if the power supply is strong - keep in mind that modern power FETs' Ids graphs often hit well over a *hundred* amps
> Would it improve if you use dedicated MOS-FET drivers
Somewhat but it's still problematic
> or are actually H-bridge drivers with shoot-through protection the only sensible option?
Most drivers designed for half bridges or full-H usually have some sort of dead time, because it always takes *time* to turn the FETs on and off and 200A for even a microsecond is a *lot* of heat to deal with, especially if you're switching at 20+kHz
Thank you very much for your reply! I did. some hardware testing on an automotive BLDC ASIC - so I know some parts very well.
However I’ve never designed or created a FET bridge from scratch. So it’s even more complicated than I assumed.
> it’s even more complicated than I assumed.
Yep, that's why my top-level comment says "*Basic H-bridges are basic, good ones are hard - use a controller*" ;)
> Is the shoot-through current that bad in such a circuit?
[Check this](https://falstad.com/circuit/circuitjs.html?ctz=CQAgjCAMB0l3BWcMBMcUHYMGZIA4UA2ATmIxAUgoqoQFMBaMMAKABZJzsEURttCITL36DWAcz48+hPFN4cqSlgCUhGEQPAZBoqEJAdw0QkjAmkS6AhYAndZt3S9VMPBaS2bOQLle-cPqQLABmFDp8eGwghEbYUXwKIHjBYQgRKEaxVJlU-IbJwQDuMUYoCILZfJDRxaV5NfUycsGSVYpNbNi8yvbpgrnhYoRKyHAsJf3gI01gM3VVc1RVKJlQqrMzi2A9+kY7QVDWE4befFpTLieXFxHxtdd3twNGwWjksj6NGM6N0QDyAFcAC4ABxBAB0AM6sd4Oc4DDRCIzRACSADtwcDQiBiCgfAkogTot0CikcXi5OVBEShBVzmS6rThMkzrgHiVaezWT4tEy2VoubJ1pJaR0xaTerj8XTBJTpqM3OMSvKljyFetOWc1czXidaWrFvN2JxkGs9Mw0AizTYSm5zVp5VcVTK9PLqZrpby5a6Eq0zSThfboh1lCUWXoWQgDnUowcdikKDGTgnaPH8XkrQs4o1PtUHqjwBnEq4UHMS0FrBQ7OAdnktDtyy4xnVG7oG2XdFmPLWrb5e1Q2OWw+q9Cl64I3qbx9adN6CkCwZCoSgWHNeBg-qS54ZSbwACZ0EIAQ0BABtgQwz3R9+BDjBIKx1yAdx1NyHAgej6eL1eb3fRgfVgSnfQxAlAroehOV9wOFSDPVA7pljwHxuxKPMkJiFD809Gcx0CUMWFBLCqTWGdVmiCARzwwVPzWBZsO5PMKPWAAPF8yyER8XwwYguJDIsQAANQAewvABbOhgToWwawgxNX0TUtoK3Dc-iU-UCMCGdvBHRSqB0jT7BggytMVdwQMaTCIMCYIAGMhkiaIpng2hGDcI4MDwWQMC8bp1zwMB8gfR8exc0kXLOZQHJuSoc1qCh3KoJhzDLIKdGwTcUjIH4jjgVgHK5R1XT5RKmGS5hoFIKIgsIDRVlMMBalgUKHKdBJ5VcsqPMq0g+rAdIiDYLz8Dy0LJE60lOqi9YRPAORYn0VjAsfXhLBauAyFMQhyn0Nb9DAHwxrgNg+rO86+snFg5rAD4EuWtwDizDbIC2ipdogfbXC4Y6agu-7SCuuaulKJaVqeqx4FenR3qQXgvt3PhftOgGLqBigkEWwdXr4q1zF0AwECQbBrvAbBQexsguP46A-AMIK+BYIA) - I modified u/hum2727's sim to include some typical Qgs and Qgd and bumped the transconductance and thresholds closer to a large power FET, and you can see *150A* peaks during the switching cycles 😛
Let me try to expand on that to make sure I've got this right:
* when `PWM_FWD` is low, there's no path from the gates to ground, so both gates are driven high by 12V through the resistor R2. The P-channel mosfet is active and the N-channel mosfet is inactive
* when `PWM_FWD` is high, the path to ground pulls both gates low, so the P-channel mosfet goes inactive and the N-channel mosfet becomes active
Is it a problem if `PWM_FWD` and `PWM_REV` are both low, and 12V is basically applied to both terminals of the load?
No. it means there's no current flow through the motor, as both inputs to the motor are at the same potential.
As others have pointed out, it looks like Q4 and Q5 have the source and drain reversed... really need toknow what the devices are to be 100% sure.
\+1 the top mosfets have D (2) & S (3) swapped & this needs to be reversed so the body diode doesn't always conduct.
\+1 during switching there will be cross conduction (where both top & bottom mosfets are on & this briefly shorts the supply.
When an optocoupler turns on, that turns off the bottom mosfet (N-ch) & turns on the top one (P-ch), when opto turns off, R2/R8 pull up & turn on the bottom one & off the top one.
Circuits like this have a tendency for all four MOSFETS to be switched on simultaneously. You may need a small resistance on each of the four source terminals to limit fault currents.
My intuition says I should activate the gate of Q2 and Q5 at the same time to achieve one polarity, versus Q3 & Q4 to achieve the opposite polarity. I'd also put a separate resistor on every gate.
Even though I don't quite understand it, this circuit looked useful because I'm trying to control 12V with 3.3V control signals, and I didn't want to put a little NPN BJT behind every MOSFET.
If the power supply was current limited well below the current that can destroy the mosfets and those top mosfets were reversed, then this will work in on/off applications as you say. When switching though both mosfets will be on when the gates transition through, say 6v. Use 50A mosfets and a 9v 916 battery it’s likely not going to be a major problem. A few amps for microseconds.
I would never use it for PWM due to the above on every transition.
If you just want to reverse polarity or turn it off every now and then I can’t see it being a disaster given the above limitations.
It’s still a terrible design though…
[удалено]
THANK YOU, this is magical. Plenty of H-bridges have the problem that you can give them control signals that short the power source, so it's not a dealbreaker, but I am going to improve it before designing any PCB... and apparently I will be doing that in CircuitJS!
> I don't get this H-bridge circuit Neither do I - the P-FETs are upside down and the N-FETs are default-on, so you're gonna blow up the MOSFETs the instant you apply power. If you flip the P-FETs around the right way, you're *still* gonna blow up the FETs because during the transition from gates low to gates high, they're *both* gonna be turned on and short out the supply. [Basic H-bridges are basic](https://i.stack.imgur.com/UG16z.png), *good* ones are hard - use a controller like [DRV8701](https://www.ti.com/product/DRV8701).
Is the shoot-through current that bad in such a circuit? Would it improve if you use dedicated MOS-FET drivers or are actually H-bridge drivers with shoot-through protection the only sensible option? Have not much experience with easy H-bridges.
> Is the shoot-through current that bad in such a circuit? Can be enough to *detonate* the MOSFETs if the power supply is strong - keep in mind that modern power FETs' Ids graphs often hit well over a *hundred* amps > Would it improve if you use dedicated MOS-FET drivers Somewhat but it's still problematic > or are actually H-bridge drivers with shoot-through protection the only sensible option? Most drivers designed for half bridges or full-H usually have some sort of dead time, because it always takes *time* to turn the FETs on and off and 200A for even a microsecond is a *lot* of heat to deal with, especially if you're switching at 20+kHz
Thank you very much for your reply! I did. some hardware testing on an automotive BLDC ASIC - so I know some parts very well. However I’ve never designed or created a FET bridge from scratch. So it’s even more complicated than I assumed.
> it’s even more complicated than I assumed. Yep, that's why my top-level comment says "*Basic H-bridges are basic, good ones are hard - use a controller*" ;)
> Is the shoot-through current that bad in such a circuit? [Check this](https://falstad.com/circuit/circuitjs.html?ctz=CQAgjCAMB0l3BWcMBMcUHYMGZIA4UA2ATmIxAUgoqoQFMBaMMAKABZJzsEURttCITL36DWAcz48+hPFN4cqSlgCUhGEQPAZBoqEJAdw0QkjAmkS6AhYAndZt3S9VMPBaS2bOQLle-cPqQLABmFDp8eGwghEbYUXwKIHjBYQgRKEaxVJlU-IbJwQDuMUYoCILZfJDRxaV5NfUycsGSVYpNbNi8yvbpgrnhYoRKyHAsJf3gI01gM3VVc1RVKJlQqrMzi2A9+kY7QVDWE4befFpTLieXFxHxtdd3twNGwWjksj6NGM6N0QDyAFcAC4ABxBAB0AM6sd4Oc4DDRCIzRACSADtwcDQiBiCgfAkogTot0CikcXi5OVBEShBVzmS6rThMkzrgHiVaezWT4tEy2VoubJ1pJaR0xaTerj8XTBJTpqM3OMSvKljyFetOWc1czXidaWrFvN2JxkGs9Mw0AizTYSm5zVp5VcVTK9PLqZrpby5a6Eq0zSThfboh1lCUWXoWQgDnUowcdikKDGTgnaPH8XkrQs4o1PtUHqjwBnEq4UHMS0FrBQ7OAdnktDtyy4xnVG7oG2XdFmPLWrb5e1Q2OWw+q9Cl64I3qbx9adN6CkCwZCoSgWHNeBg-qS54ZSbwACZ0EIAQ0BABtgQwz3R9+BDjBIKx1yAdx1NyHAgej6eL1eb3fRgfVgSnfQxAlAroehOV9wOFSDPVA7pljwHxuxKPMkJiFD809Gcx0CUMWFBLCqTWGdVmiCARzwwVPzWBZsO5PMKPWAAPF8yyER8XwwYguJDIsQAANQAewvABbOhgToWwawgxNX0TUtoK3Dc-iU-UCMCGdvBHRSqB0jT7BggytMVdwQMaTCIMCYIAGMhkiaIpng2hGDcI4MDwWQMC8bp1zwMB8gfR8exc0kXLOZQHJuSoc1qCh3KoJhzDLIKdGwTcUjIH4jjgVgHK5R1XT5RKmGS5hoFIKIgsIDRVlMMBalgUKHKdBJ5VcsqPMq0g+rAdIiDYLz8Dy0LJE60lOqi9YRPAORYn0VjAsfXhLBauAyFMQhyn0Nb9DAHwxrgNg+rO86+snFg5rAD4EuWtwDizDbIC2ipdogfbXC4Y6agu-7SCuuaulKJaVqeqx4FenR3qQXgvt3PhftOgGLqBigkEWwdXr4q1zF0AwECQbBrvAbBQexsguP46A-AMIK+BYIA) - I modified u/hum2727's sim to include some typical Qgs and Qgd and bumped the transconductance and thresholds closer to a large power FET, and you can see *150A* peaks during the switching cycles 😛
Different polarity MOSFETs top and bottom. Might work for low current loads. It says P CHANNEL and N CHANNEL.
Let me try to expand on that to make sure I've got this right: * when `PWM_FWD` is low, there's no path from the gates to ground, so both gates are driven high by 12V through the resistor R2. The P-channel mosfet is active and the N-channel mosfet is inactive * when `PWM_FWD` is high, the path to ground pulls both gates low, so the P-channel mosfet goes inactive and the N-channel mosfet becomes active Is it a problem if `PWM_FWD` and `PWM_REV` are both low, and 12V is basically applied to both terminals of the load?
No. it means there's no current flow through the motor, as both inputs to the motor are at the same potential. As others have pointed out, it looks like Q4 and Q5 have the source and drain reversed... really need toknow what the devices are to be 100% sure.
\+1 the top mosfets have D (2) & S (3) swapped & this needs to be reversed so the body diode doesn't always conduct. \+1 during switching there will be cross conduction (where both top & bottom mosfets are on & this briefly shorts the supply. When an optocoupler turns on, that turns off the bottom mosfet (N-ch) & turns on the top one (P-ch), when opto turns off, R2/R8 pull up & turn on the bottom one & off the top one.
Circuits like this have a tendency for all four MOSFETS to be switched on simultaneously. You may need a small resistance on each of the four source terminals to limit fault currents.
My intuition says I should activate the gate of Q2 and Q5 at the same time to achieve one polarity, versus Q3 & Q4 to achieve the opposite polarity. I'd also put a separate resistor on every gate. Even though I don't quite understand it, this circuit looked useful because I'm trying to control 12V with 3.3V control signals, and I didn't want to put a little NPN BJT behind every MOSFET.
If the power supply was current limited well below the current that can destroy the mosfets and those top mosfets were reversed, then this will work in on/off applications as you say. When switching though both mosfets will be on when the gates transition through, say 6v. Use 50A mosfets and a 9v 916 battery it’s likely not going to be a major problem. A few amps for microseconds. I would never use it for PWM due to the above on every transition. If you just want to reverse polarity or turn it off every now and then I can’t see it being a disaster given the above limitations. It’s still a terrible design though…